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  CPDVR105V0USP-HF page 1 qw -jp041 rev :a comchip t echnology co., l td. s l p 2 5 1 0 p 8 d i m e n s i o n s i n i n c h e s a n d ( m i l l i m e t e r ) 0 . 1 0 2 ( 2 . 6 0 ) 0 . 0 9 4 ( 2 . 4 0 ) 0 . 0 4 3 ( 1 . 1 0 ) 0 . 0 3 5 ( 0 . 9 0 ) 0 . 0 1 0 ( 0 . 2 5 ) 0 . 0 2 6 ( 0 . 6 5 ) 0 . 0 2 0 ( 0 . 5 0 ) 0 . 0 2 ( 0 . 5 0 ) b s c o electrical characteristics (at t a =25 c unless otherwise noted) symbol t yp parameter min max unit junction capacitance conditions breakdown voltage v( br) v i t = 1ma,i/o pin to gnd reverse leakage current i r ua 0.4 c j pf v r =0v , f =1mhz between i/os 6.0 1.0 v r wm = 5v , i/o pin to gnd clamping voltage esd capability kv 1 5 peak pulse power p pp w 150 storage temperature range junction temperature range 150 c t stg t j c 150 -55 v c v i pp = 1a,i/o pin to gnd(8/20s) 15 v esd iec 61000-4-2(air) iec 61000-4-2(contact) 8 v esd kv rohs device mechanical data - case: slp2510p8 small outline plastic package - t erminals: matte tin plated, solderable per mil-std-202,method 208 - mounting compound flammability rating: ul 94v -0 - w eight: 0.015 grams(approx.). - high temperature soldering guaranteed: 260c/10 second 0 . 0 0 6 ( 0 . 1 5 ) -55 0 . 0 0 2 ( 0 . 0 5 ) 0 . 0 0 0 ( 0 . 0 0 ) reverse working voltage 5.0 v r wm v features - protects four high speed i/o lines - w orking v oltage: 5v - low clamping voltage - iec61000-4-2 level 4 esd protection. - iec61000-4-4 level 4 fet protection. - low leakage current i/o pins to gnd (note 1) junction capacitance 0.8 c j pf v r =0v , f =1mhz between i/os gnd halogen free low capacitance esd protection array 0 . 0 1 8 ( 0 . 4 5 ) 0 . 0 1 4 ( 0 . 3 5 ) c o m p a n y r e s e r v e s t h e r i g h t t o i m p r o v e p r o d u c t d e s i g n , f u n c t i o n s a n d r e l i a b i l i t y w i t h o u t n o t i c e . 1 2 3 4 5 10 9 8 7 6 circuit diagram tp=8/20s waveform note: 1. esd devices are normally selected according to the working peak reverse voltage (vr wm), which should be equal or greater than the dc or continuous peak operating voltage level.
page 2 rev :a comchip t echnology co., l td. p e a k p u l s e p o w e r , p p p ( k w ) p o w e r d i s s i p a t i o n , ( m w ) f i g . 4 - p u l s e w a v e f o r m f ig . 3 - a d m is s ib le p o w e r d is s ip a t io n c u r v e reverse voltage, (%) a m b i e n t t e m p e r a t u r e , ( c ) 2 0 % 4 0 % 6 0 % 8 0 % 1 0 0 % 0 2 0 4 0 6 0 1 0 0 1 4 0 1 8 0 0 1 1 0 1 0 0 0 . 1 1 1 0 0 . 0 1 ra ting and characteristic cur ves (CPDVR105V0USP-HF) 1 0 0 0 qw -jp041 c a m p i n g v o l t a g e , ( v ) f i g . 2 - c l a m p i n g v o l t a g e v s . p e a k p u l s e c u r r e n t p e a k c u r r e n t , i p p ( a ) 0 1 0 2 0 3 0 0 2 5 c o m c h i p s m d d i o d e s p e c i a l i s t 8 0 1 6 0 1 3 4 p u l s e d u r a t i o n , ( u s ) f i g . 1 - n o n - r e p e t i t i v e p e a k p u l s e p o w e r v s . p u l s e t i m e 0 % 6 1 2 0 % t - t i m e , ( u s ) 0 % 2 0 % 4 0 % 6 0 % 8 0 % 1 0 0 % 0 5 1 5 2 5 3 0 1 0 2 0 1 2 0 % p e r c e n t a g e o f i p p t a = 2 5 c w a v e f o r m p a r a m e t e r s t f = 8 u s t d = 2 0 u s e - t t d = t i p p / 2 low capacitance esd protection array c o m p a n y r e s e r v e s t h e r i g h t t o i m p r o v e p r o d u c t d e s i g n , f u n c t i o n s a n d r e l i a b i l i t y w i t h o u t n o t i c e .
page 3 comchip t echnology co., l td. reel t aping specification t railer device leader 10 pitches (min) 10 pitches (min) ....... ....... ....... ....... ....... ....... ....... ....... end start direction of feed rev :a qw -jp041 b c d d d 2 d 1 s l p 2 5 1 0 p 8 s y m b o l a ( m m ) ( i n c h ) 2 . 1 4 2 0 . 0 1 6 1 . 2 3 0 . 1 0 2 . 7 7 0 . 1 0 4 . 0 0 0 . 1 0 1 . 5 0 0 . 1 0 3 . 5 0 0 . 0 5 1 . 7 5 0 . 1 0 5 4 . 4 0 . 4 0 1 3 . 0 0 . 2 0 0 . 7 0 0 . 1 0 4 . 0 0 0 . 1 0 2 . 0 0 0 . 0 5 0 . 2 2 9 0 . 0 1 3 1 2 . 3 0 . 2 0 1 7 8 1 0 . 1 0 9 0 . 0 0 4 0 . 0 4 8 0 . 0 0 4 0 . 0 2 8 0 . 0 0 4 0 . 0 5 9 0 . 0 0 4 7 . 0 0 8 0 . 0 3 9 0 . 5 1 2 0 . 0 0 8 s y m b o l ( m m ) ( i n c h ) 0 . 1 3 8 0 . 0 0 2 0 . 0 6 9 0 . 0 0 4 0 . 1 5 7 0 . 0 0 4 0 . 1 5 7 0 . 0 0 4 0 . 0 7 9 0 . 0 0 2 0 . 4 8 4 0 . 0 0 8 e f p p 0 p 1 t w 1 s l p 2 5 1 0 p 8 8 . 1 0 0 . 2 0 w 0 . 3 1 9 0 . 0 0 8 0 . 0 0 9 0 . 0 0 1 d 1 d 2 d w 1 t c o 1 2 0 i n d e x h o l e d e f b w p p 0 p 1 a low capacitance esd protection array c o m p a n y r e s e r v e s t h e r i g h t t o i m p r o v e p r o d u c t d e s i g n , f u n c t i o n s a n d r e l i a b i l i t y w i t h o u t n o t i c e .
page 4 rev :a comchip t echnology co., l td. marking code p524 qw -jp041 part number CPDVR105V0USP-HF marking code p524 suggested p ad layout size (inch) 0.034 (mm) 0.875 0.200 0.500 0.008 0.020 slp2510p8 1.000 0.039 e 0.200 0.008 a b c d c o m c h i p s m d d i o d e s p e c i a l i s t h b a c e f d 0.016 0.400 0.675 1.550 0.027 0.061 f g h + + + + + + + + + g ? standard packaging case t ype qty per reel (pcs) 3,000 reel size (inch) 7 slp2510p8 low capacitance esd protection array c o m p a n y r e s e r v e s t h e r i g h t t o i m p r o v e p r o d u c t d e s i g n , f u n c t i o n s a n d r e l i a b i l i t y w i t h o u t n o t i c e .


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